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In this post, I am going to discuss about isolation cell in detail. Isolation cells are indispensable part of a multi voltage design in current vlsi world.
What is an Isolation Cell?
Isolation cell is a basic logic gate which is used to pull-up (logic 1) or pull-down ( logic 0 ) a logic node when the node is supposed to get invalid logic (unknown voltage/ intermediate voltage) . This invalid logic may happen when the design is having more than one voltage and the voltages are kept on all the time. Let’s say voltage domain VDDA is on all the time after the initial turning on a chip. The other voltage domain VDDB may switch off in between depending on some condition. When the VDDB domain is switched the the output of all the logic gets associated with VDDB domain would be at logic x or unknown state (OFF state). This VDDB logic gates may be driving some VDDA logic and the VDDA logic is expecting logic value as it’s not in OFF state. But as VDDB logic gates are driving logic x, the functionality gets corrupted. To mitigate this, we need isolation cell which will drive the required logic 0, logic 1 or latch value to VDDA domain.![]()
Isolation Cell Types
Pull Down/ Clamp to Zero Isolation Cell:
The pull-down isolation cells are simple AND gates. For an AND gate, if you make one input zero then the output would be at logic zero. So, AND gate is placed in between VDDB logic and VDDA logic . The other input of AND gate is connected to control input that goes to zero whenever there is OFF (VDDB) to ON (VDDA) type scenario happens. From the below, we can see when isolation control input EN is at logic 1, output is same as input and functionality is intact. But when EN is zero isolation cell output is at logic zero and it doesn’t matted what the input is.
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There is another special type pull-down isolation cell is present which is a NOR gate with inverted logic input A. The EN input is not inverted. The output can be written as X=A.EN’ . This is useful in cases where the isolation cell is placed in OFF domain (VDDB) itself. It doesn’t require any power supply to pull down the node as power is off in off domain.
Pull UP/ Clamp to One Isolation Cell
The pull up isolation cells are simple OR gates. When isolation is not required isolation control signal is at logic 0, and output is same as input. But when isolation is required with clamping to logic 1 , the control input EN goes to logic 1 and the output is pulled to logic 1 irrespective of logic input A.![]()
Latch Type Isolation Cell
Latch type isolation cells are simple D-latch. These isolation cells are used when the clamp value is not certain and latched value is fed to VDDA domain. This works with the same principal. When the D-latch control input EN is at logic 1, the input is same as output. But when the latch control input goes to logic zero, the captured value is fed to the output. The output can be at logic 0 or 1, depending at captured value. But the captured value won’t change even if the input D value changes.![]()
Important Points
Latch type isolation cells should have dual supply. This is required because to hold the value it needs supply.
Pull up isolation cells can have dual supply ( two supply). These can be kept in OFF domain even if the off domain supply is not available.
Similarly, Pull down AND type isolation can be of dual supply type. These can be placed in off domain with on supply.
For NOR type pull down isolation cell only single supply is required.
付费文章汇总（截止2024年06月02日）
isolation cell是shutdown模块和always on模块之间的接口。
当信号从一个module传入另一个module，如果shutdown模块的电源关闭，则输出信号可能出现不可预测的数值，若此数值传递给always on模块，可能会导致功能出现问题。因此需要将电源关闭module的输出信号和其他module隔离开来，给所有的边界信号加入isolation cell（ISO）。
Isolation cell的作用在于在电源关掉之后，将某个信号电位固定到高电位或低电位，保证输出的信号是一个确定值（1或0）。其原理也很简单，基本上等同于AND或者OR门。
而电源打开时，Isolation cell则表现的像一个Buffer，输出等于输入即可。同时，如果被关断的电路输入固定电压，也可能产生对地的电流，Isolation cell可对该部分电流进行保护。一般来说Isolation Cell的输出部分有较大的电容负载，也就是说Isolation Cell的延时将会比较大，对时序有一定的影响，是需要注意的。![]()
为了保证isolation cell能够在power down的时候仍然能够正常工作，一般来说isolation cell都会有一个primary power和一个secondary power，后者能够保证前者power down时器件仍然能够工作。
关于isolation cell的插入位置，我们需要决定是放在power gated module (source module)内还是always-on module (destination module)内。
摆放在 source module 的ouput 端一是可以节省所需要的 isolation cell 数量（考虑一个模块引脚的输出连到多个模块引脚的输入的情况），二是便于check。
摆放在destination module的input 端优点是 isolation cell 需要 always-on 的 power。若放在 source module的output端，还需要引 always-on 的 power rail 过来。
不管放在那里，其power的连接都需要额外的注意。isolation放置的地方都需要gated power和always-on power同时存在并且物理和逻辑连接都正确，因此经常会把isolation cell指定一个固定的区域放置，可以选择在此区域中打上两种不同的power stripe和power rail来连接它们，抑或选择让工具以自动routing的方式将secondary power连接起来，后者主要在非先进工艺中才可能出现。![]()
对于数字后端实现而言，这个Isolation cell需要在综合阶段编写upf，让工具自动插入。
如果在source module进行 output isolation，那么需要避免power-gated buffer被插入到isolation cell的输出信号后面。
如果在destination module进行input isolation，在布局布线阶段，需要将ISO cell的input pin设置dont_touch，防止在PD2 输出信号和ISO cell之间插buffer。（个人理解：因为ISO cell是用来保证PD2关断之后，将PD2输出的X态信号转换成稳定的高/低信号，而如果在PD2输出信号和ISO cell之间插入了buffer，在PD2关断时，PD2的输出是X态，插入的这个buffer的状态就会有问题。）
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