DVCON是电子系统和集成电路设计与验证领域的顶级会议，主要关注语言、工具、方法和技术标准应用。
本次新增DVCON United States 2024部分的论文，其中：
presentation 39篇；
paper 52篇；
poster 15篇；
部分论文如下：
PyRDV: a Python-based solution to the requirements traceability problem
Crafting a Million Instructions/Sec RISCV-DV HPC Techniques to Boost UVM Testbench Performance by Over 100x
Verification Plan in Requirements Management Tool: Simple Traceability and Automated Interface to Regression Manager
A Configurable, Re-usable UVM Environment Coupled with Advanced Spice Simulator for Analog and Mixed-Signal Verification of a Display PMIC
RTL Transformation Methods to Achieve Order of Magnitude TAT Improvement in VLSI Design
Functional Coverage Closure with Python
Metric Driven Microcode Verification: Navigating Microcode Coverage Complexities
Expediting SoC Design Verification Closure by Accelerating Gate Level Simulations using Streamlined Smart Decentralized Testbench
Large Language Model for Verification: A Review and Its Application in Data Augmentation
New Innovative Way to Verify Package Connectivity
Towards Efficient Design Verification – Constrained Random Verification using PyUVM
Synthetic Traffic based SOC Performance Verification Methodology
....
文档数量较大，分类收集整理不易，谢谢支持。此前已付费的小伙伴可私信获取下载链接。(超2500篇！DVCON 论文全集下载)
下载链接：
