GICv3.0 Key features
Support for large systems (up to 2^32 PEs)
Large numbers of cores on both single-chip implementations and multi-chip implementations
New interrupt type, LPIs, which increases the number of interrupts
LPIs also provided better alignment with PCIe, translating MSIs to interrupts by Interrupt Translation Service (ITS)
Full MSIs support for SPIs and LPIs
New system register interface for handling interrupts
Optional legacy mode for backwards compatibility with GICv2
GICv3.0 implementations by Arm:
GICv3.1 key features
Support for an additional 1024 SPIs
Targeted at multi-chip implementations, where the number of SPIs per chip is low, but the number of chips means that the existing range is exhausted
Support for an additional 64 PPIs per PE
Support for MPAM, to align with Armv8.4
Only specifies how software configures PARTIDs/PMGs, not what the GIC uses them for
Based heavily on the MPAM specification
Support for Secure virtualization, to align with Armv8.4-A
Extends existing GICv3.0 support to Secure state
GICv3.1 implementation by Arm:
GICv3.2 key features
To support Armv8-R AArch64 architecture, GICv3.2 introduced a minimal set of changes:
GICv4.0 key features
Support for direct injection of virtual LPIs
Reduces the number of required entries to Hypervisor, reducing overhead of virtualization
GICv4.1 key features
Support for direct injection of virtual SGIs
Allow more use of GICv4.0 direct injection logic, extending benefits of direct injection to vSGIs
Improved doorbell mechanism, to increase efficiency of taking vPE from idle to schedulable
GICv4.1 implementation by Arm
GICv3 特性
支持中断虚拟化:提供对虚拟化环境的支持,允许多个虚拟机共享物理中断。
分层中断结构:引入了更灵活的中断分配和管理机制,允许不同的中断控制器层次进行更好的管理。
支持更高数量的中断:相较于前代,GICv3能够支持更多的中断源。
中断路由和屏蔽:通过更高级的路由和屏蔽机制,提高了中断的灵活性和响应速度。
增强的性能:通过简化中断处理路径,降低延迟,提升系统的整体性能。
扩展的寄存器集:提供更多的寄存器以便于配置和控制中断。
GICv4 特性
增强的中断虚拟化能力:引入更先进的虚拟化支持,包括支持扩展的虚拟中断和更好的性能。
Fault Tolerance:增加了对系统故障的容错能力,能够在中断处理时提供更高的可靠性。
自适应中断优先级:支持动态调整中断优先级,提高系统对实时应用的响应能力。
扩展的中断路由功能:进一步增强中断路由能力,使得中断分配和处理更加灵活和高效。
可编程的中断控制:允许用户自定义中断处理方式,适应不同的应用需求。
性能优化:在中断的触发、处理和屏蔽等多个环节进行优化,减少系统开销,提高响应速度。